The present invention relates to an electrical circuit for determining the resultant inner and outer contours of multiple polygonal superposed images stored in a memory unit. Such images are frequently used to represent sections of a workpiece and tool in microprocessor controlled numerical machine stations.
In using these tools, it is frequently advantageous to check the accuracy of the programming with the aid of a graphical representation of the processed workpiece.
Multidimensional representation of workpieces by sectional representation on microprocessor based graphic systems using software display algorithms is common practice. However, this representation is costly in terms of the apparatus and the computational time required. The computational time is especially critical in real time graphic display systems. Simple less expensive microprocessor systems can be used for the graphics display, but the quality of the representation is sacrificed due to the limited computational abilities of these microprocessor systems. Such systems are described in European Pat. Nos. EP-A2-0 089 561 and EP-A2-0 089 562. Also a display device using a read/write memory selectively addressable by an address unit is described in German No. DE-A-28 50 710. To date, commonly used software for generating workpiece images on microprocessor based graphic systems is not totally satisfactory for real time representation.